Page Title: Physical IP – Arm®

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Page Description: Arm Artisan the leading provider of standard cells, memories & interface IP for SoC implementations, provides optimized IP for CMOS, HKMG and FinFET

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Page Text: ARM PHYSICAL IP AND IMPLEMENTATION Physical Implementation for POP IP and Artisan Physical IP Physical implementation is required to take a processor from RTL to silicon. This step ­– optimizing power, performance, area and cost – is crucial but can be complex, time-consuming and costly. Arm POP (Processor Optimized Package) IP leverages our market-leading processor knowledge with Artisan Physical IP products to deliver the most efficient and highest-performance Arm processor implementations for our licensees. This powerful, combined solution accelerates core hardening so designers can spend more time on SoC and software integration and get to market faster. Features and Benefits The development of Arm Physical and POP IP has yielded proven results for partners worldwide with benefits that include: Superior Performance and Energy Efficiency Developed through a tightly coupled collaboration across Arm engineering in an iterative process, Arm Physical IP and implementation identifies the optimal performance and energy results for Arm cores. Advanced Deep Submicron SoC Designs Leveraging Artisan physical IP, Arm POP IP addresses implementing challenges of new cores at advanced process nodes to guide the designers quickly through their implementation. Time-to-Market Acceleration Arm POP IP is core-hardening acceleration technology for the best silicon results, enabling our partners to bring their products to volume faster. Software Enablement Arm RTL and physical IP architects work together to ensure on-chip programmable options are available to manipulate via software. Market Applications for Physical IP Arm Physical and POP IP are developed working in tight collaboration with Arm’s architecture team to ensure accurate, reliable design outcomes: Automotive

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